Runtime characterisation of irregular accesses applied to parallelisation of irregular reductions

Irregular reduction operations are the core of many large scientific and engineering applications. There are, in the literature, different methods to solve these operations in parallel. In this paper we discuss a new technique which improves performance significantly, both in terms of execution time and memory overhead. These improvements are achieved in the preprocessing as well as in the resulting parallel code. Our proposal is based on the use of the Irregular Access Region Descriptor (IARD). This data structure is a compact characterisation of indirectly accessed arrays that can be used for the efficient parallelisation of a wide spectrum of irregular codes. In this paper we present its application to parallelise irregular reduction operations on a shared memory machine. We compare our proposal with two other competitive solutions.